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  • - Hardware Implementation and Correctness Proof
    af Mikhail Kovalev, Wolfgang J. Paul & Silvia M. Müller
    882,95 kr.

    It contains a gate level construction of a multi-core machine with pipelined MIPS processor cores and a sequentially consistent shared memory.The book contains the first correctness proofs for both the gate level implementation of a multi-core processor and also of a cache based sequentially consistent shared memory.

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