Bøger af Tsutomu Sasao

This book introduces a novel perspective on machine learning, offering distinct advantages over neural network-based techniques. This approach boasts a reduced hardware requirement, lower power consumption, and enhanced interpretability. The applications of this approach encompass high-speed classifications, including packet classification, network intrusion detection, and exotic particle detection in high-energy physics. Moreover, it finds utility in medical diagnosis scenarios characterized by small training sets and imbalanced data. The resulting rule generated by this method can be implemented either in software or hardware. In the case of hardware implementation, circuit design can employ look-up tables (memory), rather than threshold gates.The methodology described in this book involves extracting a set of rules from a training set, composed of categorical variable vectors and their corresponding classes. Unnecessary variables are eliminated, and the rules are simplified before being transformed into a sum-of-products (SOP) form. The resulting SOP exhibits the ability to generalize and predict outputs for new inputs. The effectiveness of this approach is demonstrated through numerous examples and experimental results using the University of California-Irvine (UCI) dataset.This book is primarily intended for graduate students and researchers in the fields of logic synthesis, machine learning, and data mining. It assumes a foundational understanding of logic synthesis, while familiarity with linear algebra and statistics would be beneficial for readers.

Index generation functions are binary-input integer valued functions. They represent functions of content addressable memories (CAMs). Applications include: IP address tables; terminal controllers; URL lists; computer virus scanning circuits; memory patch circuits; list of English words; code converters; and pattern matching circuits. This book shows memory-based realization of index generation functions. It shows:1. methods to implement index generation functions by look-up table (LUT) cascades and index generation units (IGU),2. methods to reduce the number of variables using linear transformations, and3. methods to estimate the sizes of memories,with many illustrations, tables, examples, exercises, and their solutions.

This book brings together five topics on the application of Boolean functions. They are 1. Equivalence classes of Boolean functions: The number of n-variable functions is large, even for values as small as n = 6, and there has been much research on classifying functions. There are many classifications, each with their own distinct merit. 2. Boolean functions for cryptography: The process of encrypting/decrypting plaintext messages often depends on Boolean functions with specific properties. For example, highly nonlinear functions are valued because they are less susceptible to linear attacks. 3. Boolean differential calculus: An operation analogous to taking the derivative of a real-valued function offers important insight into the properties of Boolean functions. One can determine tests or susceptibility to hazards. 4. Reversible logic: Most logic functions are irreversible; it is impossible to reconstruct the input, given the output. However, Boolean functions that are reversible are necessary for quantum computing, and hold significant promise for low-power computing. 5. Data mining: The process of extracting subtle patterns from enormous amounts of data has benefited from the use of a graph-based representation of Boolean functions. This has use in surveillance, fraud detection, scientific discovery including bio-informatics, genetics, medicine, and education. Written by experts, these chapters present a tutorial view of new and emerging technologies in Boolean functions. Table of Contents: Equivalence Classes of Boolean Functions / Boolean Functions for Cryptography / Boolean Differential Calculus / Synthesis of Boolean Functions in Reversible Logic / Data Mining Using Binary Decision Diagrams

A zero-suppressed decision diagram (ZDD) is a data structure to represent objects that typically contain many zeros. Applications include combinatorial problems, such as graphs, circuits, faults, and data mining. This book consists of four chapters on the applications of ZDDs. The first chapter by Alan Mishchenko introduces the ZDD. It compares ZDDs to BDDs, showing why a more compact representation is usually achieved in a ZDD. The focus is on sets of subsets and on sum-of-products (SOP) expressions. Methods to generate all the prime implicants (PIs), and to generate irredundant SOPs are shown. A list of papers on the applications of ZDDs is also presented. In the appendix, ZDD procedures in the CUDD package are described. The second chapter by Tsutomu Sasao shows methods to generate PIs and irredundant SOPs using a divide and conquer method. This chapter helps the reader to understand the methods presented in the first chapter. The third chapter by Shin-Ichi Minato introduces the "e;"e;frontier-based"e;"e; method that efficiently enumerates certain subsets of a graph. The final chapter by Shinobu Nagayama shows a method to match strings of characters. This is important in routers, for example, where one must match the address information of an internet packet to the proprer output port. It shows that ZDDs are more compact than BDDs in solving this important problem. Each chapter contains exercises, and the appendix contains their solutions. Table of Contents: Preface / Acknowledgments / Introduction to Zero-Suppressed Decision Diagrams / Efficient Generation of Prime Implicants and Irredundant Sum-of-Products Expressions / The Power of Enumeration--BDD/ZDD-Based Algorithms for Tackling Combinatorial Explosion / Regular Expression Matching Using Zero-Suppressed Decision Diagrams / Authors' and Editors' Biographies / Index

Research and development of logic synthesis and verification have matured considerably over the past two decades. Many commercial products are available, and they have been critical in harnessing advances in fabrication technology to produce today's plethora of electronic components. While this maturity is assuring, the advances in fabrication continue to seemingly present unwieldy challenges. Logic Synthesis and Verification provides a state-of-the-art view of logic synthesis and verification. It consists of fifteen chapters, each focusing on a distinct aspect. Each chapter presents key developments, outlines future challenges, and lists essential references. Two unique features of this book are technical strength and comprehensiveness. The book chapters are written by twenty-eight recognized leaders in the field and reviewed by equally qualified experts. The topics collectively span the field. Logic Synthesis and Verification fills a current gap in the existing CAD literature. Each chapter contains essential information to study a topic at a great depth, and to understand further developments in the field. The book is intended for seniors, graduate students, researchers, and developers of related Computer-Aided Design (CAD) tools. From the foreword: "e;The commercial success of logic synthesis and verification is due in large part to the ideas of many of the authors of this book. Their innovative work contributed to design automation tools that permanently changed the course of electronic design."e; by Aart J. de Geus, Chairman and CEO, Synopsys, Inc.

Switching Theory for Logic Synthesis covers the basic topics of switching theory and logic synthesis in fourteen chapters.

In what will be a valuable reference for FPGA system designers and CAD tool developers, this book sets out the synthesis of logic functions using memories. Indeed, anyone using logic gates to design logic circuits will benefit from the methods described here.

Switching Theory for Logic Synthesis covers the basic topics of switching theory and logic synthesis in fourteen chapters.