Udvidet returret til d. 31. januar 2025

Boundary-Scan Interconnect Diagnosis

Bag om Boundary-Scan Interconnect Diagnosis

Boundary-Scan Interconnect Diagnosis explains how to synthesize digital diagnostic sequences for wire interconnects using boundary-scan, and how to assess the quality of those sequences. Its importance has to do with designing complex electronic systems using pre-designed intellectual property (IP) cores, which is becoming increasingly popular nowadays. Since tests for pre-designed cores can be supplied with the cores themselves, the only additional tests that need to be developed to test and diagnose the entire system are those for wire interconnects between the cores. Besides the trivial solutions that are often used to solve this problem, there are many more methods that enable significant optimizations of test vector length and/or diagnostic resolution. The book surveys all existing methods of this kind and proposes new ones. In the new approach circuit and interconnect faults are carefully modeled, and graph techniques are applied to solve the problem. The original feature of the new method is the fact that it can be adjusted to provide shorter test sequences and/or greater diagnostic resolution. The effectiveness of existing and proposed methods is then evaluated using real electronic assemblies and published statistical data for an actual manufacturing process from HP.

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  • Sprog:
  • Engelsk
  • ISBN:
  • 9781441948878
  • Indbinding:
  • Paperback
  • Sideantal:
  • 196
  • Udgivet:
  • 7. december 2010
  • Størrelse:
  • 155x11x235 mm.
  • Vægt:
  • 306 g.
  • BLACK WEEK
  Gratis fragt
Leveringstid: 8-11 hverdage
Forventet levering: 10. december 2024
Forlænget returret til d. 31. januar 2025

Beskrivelse af Boundary-Scan Interconnect Diagnosis

Boundary-Scan Interconnect Diagnosis explains how to synthesize digital diagnostic sequences for wire interconnects using boundary-scan, and how to assess the quality of those sequences. Its importance has to do with designing complex electronic systems using pre-designed intellectual property (IP) cores, which is becoming increasingly popular nowadays. Since tests for pre-designed cores can be supplied with the cores themselves, the only additional tests that need to be developed to test and diagnose the entire system are those for wire interconnects between the cores.
Besides the trivial solutions that are often used to solve this problem, there are many more methods that enable significant optimizations of test vector length and/or diagnostic resolution. The book surveys all existing methods of this kind and proposes new ones. In the new approach circuit and interconnect faults are carefully modeled, and graph techniques are applied to solve the problem. The original feature of the new method is the fact that it can be adjusted to provide shorter test sequences and/or greater diagnostic resolution. The effectiveness of existing and proposed methods is then evaluated using real electronic assemblies and published statistical data for an actual manufacturing process from HP.

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