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Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs

Bag om Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs

This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge research in this domain.

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  • Sprog:
  • Engelsk
  • ISBN:
  • 9783319023779
  • Indbinding:
  • Hardback
  • Sideantal:
  • 245
  • Udgivet:
  • 16. November 2013
  • Udgave:
  • 2014
  • Størrelse:
  • 243x157x16 mm.
  • Vægt:
  • 514 g.
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Leveringstid: 2-3 uger
Forventet levering: 23. Juli 2024

Beskrivelse af Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs

This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge research in this domain.

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