Udvidet returret til d. 31. januar 2025

Logic Synthesis and Verification Algorithms

Bag om Logic Synthesis and Verification Algorithms

Logic Synthesis and Verification Algorithms is a textbook designed for courses on VLSI Logic Synthesis and Verification, Design Automation, CAD and advanced level discrete mathematics. Logic Synthesis and Verification Algorithms is about the theoretical underpinnings of VLSI (Very Large Scale Integrated Circuits).

Vis mere
  • Sprog:
  • Engelsk
  • ISBN:
  • 9781475770360
  • Indbinding:
  • Paperback
  • Sideantal:
  • 564
  • Udgivet:
  • 18. marts 2013
  • Udgave:
  • 11996
  • Størrelse:
  • 178x254x31 mm.
  • Vægt:
  • 1126 g.
  • BLACK NOVEMBER
  Gratis fragt
Leveringstid: 8-11 hverdage
Forventet levering: 7. december 2024

Beskrivelse af Logic Synthesis and Verification Algorithms

Logic Synthesis and Verification Algorithms is a textbook designed for courses on VLSI Logic Synthesis and Verification, Design Automation, CAD and advanced level discrete mathematics. Logic Synthesis and Verification Algorithms is about the theoretical underpinnings of VLSI (Very Large Scale Integrated Circuits).

Brugerbedømmelser af Logic Synthesis and Verification Algorithms



Find lignende bøger
Bogen Logic Synthesis and Verification Algorithms findes i følgende kategorier:

Gør som tusindvis af andre bogelskere

Tilmeld dig nyhedsbrevet og få gode tilbud og inspiration til din næste læsning.